1. Field of Art
The disclosure generally relates to the emulation of circuits, and more specifically to performing logic analysis of an emulated circuit.
2. Description of the Related Art
Emulators have been developed to assist circuit designers in designing and debugging highly complex integrated circuits. An emulator includes multiple reconfigurable components, such as field programmable gate arrays (FPGAs) that together can imitate the operations of a design under test (DUT). By using an emulator to imitate the operations of a DUT, designers can verify that a DUT complies with various design requirements prior to a fabrication.
One aspect of emulation includes performing logic analysis of a DUT. In one approach, performing logic analysis involves emulating a DUT and analyzing signals from the emulated DUT with a logic analyzer to verify, for example, timing relationships and digital logic operations of the DUT. In advanced processes (e.g., 22 nm and below), a DUT may include billons of logic circuits and signals. Emulating such a complex DUT involves transferring a large amount of data between the logic analyzer and multiple FPGAs. Therefore, conventional logic analysis in an emulation environment is inefficient in terms of hardware and communication resources.